#include <dt-bindings/clock/qcom,gcc-sdm660.h>
#include <dt-bindings/clock/qcom,gpu-sdm660.h>
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>

&soc {
	csr: csr@6001000 {
		compatible = "qcom,coresight-csr";
		reg = <0x6001000 0x1000>;
		reg-names = "csr-base";

		coresight-name = "coresight-csr";
		qcom,usb-bam-support;
		qcom,hwctrl-set-support;
		qcom,set-byte-cntr-support;
		qcom,blk-size = <1>;
	};

	tmc_etr: tmc@6048000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b961>;

		reg = <0x6048000 0x1000>,
		      <0x6064000 0x15000>;
		reg-names = "tmc-base", "bam-base";

		arm,buffer-size = <0x400000>;
		arm,sg-enable;
		arm,default-sink;
		coresight-csr = <&csr>;

		coresight-ctis = <&cti0 &cti8>;

		coresight-name = "coresight-tmc-etr";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		port{
			tmc_etr_in_replicator: endpoint {
				slave-mode;
				remote-endpoint = <&replicator_out_tmc_etr>;
			};
		};
	};

	replicator_qdss: replicator@6046000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b909>;

		reg = <0x6046000 0x1000>;
		reg-names = "replicator-base";

		coresight-name = "coresight-replicator-qdss";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		ports{
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				replicator_out_tmc_etr:endpoint {
					remote-endpoint =
						<&tmc_etr_in_replicator>;
				};
			};
			port@1 {
				reg = <0>;
				replicator_in_tmc_etf:endpoint {
					slave-mode;
					remote-endpoint =
						<&tmc_etf_out_replicator>;
				};
			};
		};
	};

	tmc_etf: tmc@6047000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b961>;

		reg = <0x6047000 0x1000>;
		reg-names = "tmc-base";

		coresight-name = "coresight-tmc-etf";

		coresight-ctis = <&cti0 &cti8>;
		coresight-csr = <&csr>;
		arm,default-sink;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		ports{
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				tmc_etf_out_replicator:endpoint {
					remote-endpoint =
						<&replicator_in_tmc_etf>;
				};
			};
			port@1 {
				reg = <0>;
				tmc_etf_in_funnel_merg:endpoint {
					slave-mode;
					remote-endpoint =
						<&funnel_merg_out_tmc_etf>;
				};
			};
		};
	};

	funnel_merg: funnel@6045000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b908>;

		reg = <0x6045000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-merg";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_merg_out_tmc_etf:endpoint {
					remote-endpoint =
						<&tmc_etf_in_funnel_merg>;
				};
			};
			port@1 {
				reg = <0>;
				funnel_merg_in_funnel_in0:endpoint {
					slave-mode;
					remote-endpoint =
						<&funnel_in0_out_funnel_merg>;
				};
			};
			port@2 {
				reg = <1>;
				funnel_merg_in_funnel_in1:endpoint {
					slave-mode;
					remote-endpoint =
						<&funnel_in1_out_funnel_merg>;
				};
			};
		};
	};

	funnel_in0: funnel@6041000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b908>;

		reg = <0x6041000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-in0";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_in0_out_funnel_merg: endpoint {
					remote-endpoint =
						<&funnel_merg_in_funnel_in0>;
				};
			};
			port@2 {
				reg = <6>;
				funnel_in0_in_funnel_qatb: endpoint {
					slave-mode;
					remote-endpoint =
						<&funnel_qatb_out_funnel_in0>;
				};
			};
			port@3 {
				reg = <7>;
				funnel_in0_in_stm: endpoint {
					slave-mode;
					remote-endpoint = <&stm_out_funnel_in0>;
				};
			};
			port@4 {
				reg = <0>;
				funnel_in0_in_rpm_etm0: endpoint {
					slave-mode;
					remote-endpoint =
						<&rpm_etm0_out_funnel_in0>;
				};
			};
		};
	};

	funnel_in1: funnel@6042000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b908>;

		reg = <0x6042000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-in1";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_in1_out_funnel_merg: endpoint {
					remote-endpoint =
						<&funnel_merg_in_funnel_in1>;
				};
			};
			port@1 {
				reg = <2>;
				funnel_in1_in_tpda_nav: endpoint {
					slave-mode;
					remote-endpoint =
					    <&tpda_nav_out_funnel_in1>;
				};
			};
			port@2 {
				reg = <5>;
				funnel_in1_in_modem_etm0: endpoint {
					slave-mode;
					remote-endpoint =
					    <&modem_etm0_out_funnel_in1>;
				};
			};
			port@3 {
				reg = <6>;
				funnel_in1_in_funnel_apss_merg: endpoint {
					slave-mode;
					remote-endpoint =
					    <&funnel_apss_merg_out_funnel_in1>;
				};
			};
			port@4 {
				reg = <4>;
				funnel_in1_in_turing_etm0: endpoint {
					slave-mode;
					remote-endpoint =
					    <&turing_etm0_out_funnel_in1>;
				};
			};
		};
	};

	funnel_apss_merg: funnel@7b70000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b908>;

		reg = <0x7b70000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-apss-merg";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_apss_merg_out_funnel_in1: endpoint {
					remote-endpoint =
					    <&funnel_in1_in_funnel_apss_merg>;
				};
			};
			port@1 {
				reg = <0>;
				funnel_apss_merg_in_funnel_apss: endpoint {
					slave-mode;
					remote-endpoint =
					    <&funnel_apss_out_funnel_apss_merg>;
				};
			};
			port@2 {
				reg = <1>;
				funnel_apss_merg_in_tpda_olc: endpoint {
					slave-mode;
					remote-endpoint =
					    <&tpda_olc_out_funnel_apss_merg>;
				};
			};
			port@3 {
				reg = <3>;
				funnel_apss_merg_in_tpda_apss: endpoint {
					slave-mode;
					remote-endpoint =
					    <&tpda_apss_out_funnel_apss_merg>;
				};
			};
		};
	};

	funnel_apss: funnel@7b60000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b908>;

		reg = <0x7b60000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-apss";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_apss_out_funnel_apss_merg: endpoint {
					remote-endpoint =
					    <&funnel_apss_merg_in_funnel_apss>;
				};
			};
			port@1 {
				reg = <0>;
				funnel_apss_in_etm0: endpoint {
					slave-mode;
					remote-endpoint =
						<&etm0_out_funnel_apss>;
				};
			};
			port@2 {
				reg = <1>;
				funnel_apss_in_etm1: endpoint {
					slave-mode;
					remote-endpoint =
						<&etm1_out_funnel_apss>;
				};
			};
			port@3 {
				reg = <2>;
				funnel_apss_in_etm2: endpoint {
					slave-mode;
					remote-endpoint =
						<&etm2_out_funnel_apss>;
				};
			};
			port@4 {
				reg = <3>;
				funnel_apss_in_etm3: endpoint {
					slave-mode;
					remote-endpoint =
						<&etm3_out_funnel_apss>;
				};
			};
			port@5 {
				reg = <4>;
				funnel_apss_in_etm4: endpoint {
					slave-mode;
					remote-endpoint =
						<&etm4_out_funnel_apss>;
				};
			};
			port@6 {
				reg = <5>;
				funnel_apss_in_etm5: endpoint {
					slave-mode;
					remote-endpoint =
						<&etm5_out_funnel_apss>;
				};
			};
			port@7 {
				reg = <6>;
				funnel_apss_in_etm6: endpoint {
					slave-mode;
					remote-endpoint =
						<&etm6_out_funnel_apss>;
				};
			};
			port@8 {
				reg = <7>;
				funnel_apss_in_etm7: endpoint {
					slave-mode;
					remote-endpoint =
						<&etm7_out_funnel_apss>;
				};
			};
		};
	};

	stm: stm@6002000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b962>;

		reg = <0x6002000 0x1000>,
		      <0x16280000 0x180000>;
		reg-names = "stm-base", "stm-stimulus-base";

		coresight-name = "coresight-stm";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		port{
			stm_out_funnel_in0: endpoint {
				remote-endpoint = <&funnel_in0_in_stm>;
			};
		};
	};

	etm0: etm@7840000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb95d>;

		reg = <0x7840000 0x1000>;
		cpu = <&CPU0>;

		coresight-name = "coresight-etm0";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		port{
			etm0_out_funnel_apss: endpoint {
				remote-endpoint = <&funnel_apss_in_etm0>;
			};
		};
	};

	etm1: etm@7940000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb95d>;

		reg = <0x7940000 0x1000>;
		cpu = <&CPU1>;

		coresight-name = "coresight-etm1";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		port{
			etm1_out_funnel_apss: endpoint {
				remote-endpoint = <&funnel_apss_in_etm1>;
			};
		};
	};

	etm2: etm@7a40000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb95d>;

		reg = <0x7a40000 0x1000>;
		cpu = <&CPU2>;

		coresight-name = "coresight-etm2";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		port{
			etm2_out_funnel_apss: endpoint {
				remote-endpoint = <&funnel_apss_in_etm2>;
			};
		};
	};

	etm3: etm@7b40000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb95d>;

		reg = <0x7b40000 0x1000>;
		cpu = <&CPU3>;

		coresight-name = "coresight-etm3";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		port{
			etm3_out_funnel_apss: endpoint {
				remote-endpoint = <&funnel_apss_in_etm3>;
			};
		};
	};

	etm4: etm@7c40000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb95d>;

		reg = <0x7c40000 0x1000>;
		cpu = <&CPU4>;

		coresight-name = "coresight-etm4";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		port{
			etm4_out_funnel_apss: endpoint {
				remote-endpoint = <&funnel_apss_in_etm4>;
			};
		};
	};

	etm5: etm@7d40000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb95d>;

		reg = <0x7d40000 0x1000>;
		cpu = <&CPU5>;

		coresight-name = "coresight-etm5";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		port{
			etm5_out_funnel_apss: endpoint {
				remote-endpoint = <&funnel_apss_in_etm5>;
			};
		};
	};

	etm6: etm@7e40000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb95d>;

		reg = <0x7e40000 0x1000>;
		cpu = <&CPU6>;

		coresight-name = "coresight-etm6";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		port{
			etm6_out_funnel_apss: endpoint {
				remote-endpoint = <&funnel_apss_in_etm6>;
			};
		};
	};

	etm7: etm@7f40000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb95d>;

		reg = <0x7f40000 0x1000>;
		cpu = <&CPU7>;

		coresight-name = "coresight-etm7";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		port{
			etm7_out_funnel_apss: endpoint {
				remote-endpoint = <&funnel_apss_in_etm7>;
			};
		};
	};

	cti0: cti@6010000 {
		compatible = "arm,primecell";
		reg = <0x6010000 0x1000>;
		arm,primecell-periphid = <0x0003b966>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti0";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti1: cti@6011000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x6011000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti1";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti2: cti@6012000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x6012000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti2";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		qcom,cti-gpio-trigout = <4>;
		pinctrl-names = "cti-trigout-pctrl";
		pinctrl-0 = <&trigout_a>;
	};

	cti3: cti@6013000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x6013000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti3";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti4: cti@6014000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x6014000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti4";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti5: cti@6015000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x6015000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti5";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti6: cti@6016000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x6016000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti6";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti7: cti@6017000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x6017000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti7";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti8: cti@6018000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x6018000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti8";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti9: cti@6019000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x6019000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti9";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti10: cti@601a000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x601a000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti10";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti11: cti@601b000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x601b000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti11";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti12: cti@601c000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x601c000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti12";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti13: cti@601d000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x601d000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti13";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti14: cti@601e000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x601e000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti14";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti15: cti@601f000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x601f000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti15";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_cpu0: cti@7820000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;

		reg = <0x7820000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-cpu0";
		cpu = <&CPU0>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_cpu1: cti@7920000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7920000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-cpu1";
		cpu = <&CPU1>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_cpu2: cti@7a20000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7a20000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-cpu2";
		cpu = <&CPU2>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_cpu3: cti@7b20000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7b20000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-cpu3";
		cpu = <&CPU3>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_cpu4: cti@7c20000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7c20000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-cpu4";
		cpu = <&CPU4>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_cpu5: cti@7d20000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7d20000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-cpu5";
		cpu = <&CPU5>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_cpu6: cti@7e20000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7e20000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-cpu6";
		cpu = <&CPU6>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_cpu7: cti@7f20000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7f20000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-cpu7";
		cpu = <&CPU7>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_apss: cti@7b80000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7b80000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-apss";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_apss_dl: cti@7bc1000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7bc1000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-apss-dl";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_olc: cti@7b91000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7b91000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-olc";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_turing: cti@7068000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7068000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-turing";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_wcss0: cti@71a4000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x71a4000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-wcss0";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
		status = "disabled";
	};

	cti_wcss1: cti@71a5000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x71a5000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-wcss1";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
		status = "disabled";
	};

	cti_wcss2: cti@71a6000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x71a6000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-wcss2";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
		status = "disabled";
	};

	cti_mmss: cti@7188000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7188000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-mmss";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_isdb: cti@7121000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7121000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-isdb";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
		status = "disabled";
	};

	cti_rpm: cti@7048000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7048000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-rpm";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	cti_mss: cti@7041000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b966>;
		reg = <0x7041000 0x1000>;
		reg-names = "cti-base";

		coresight-name = "coresight-cti-mss";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";
	};

	funnel_qatb: funnel@6005000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b908>;

		reg = <0x6005000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-qatb";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_qatb_out_funnel_in0: endpoint {
					remote-endpoint =
					    <&funnel_in0_in_funnel_qatb>;
				};
			};
			port@1 {
				reg = <0>;
				funnel_qatb_in_tpda: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpda_out_funnel_qatb>;
				};
			};
			port@2 {
				reg = <3>;
				funnel_qatb_in_funnel_dlct: endpoint {
					slave-mode;
					remote-endpoint =
						<&funnel_dlct_out_funnel_qatb>;
				};
			};
		};
	};

	tpda: tpda@6004000 {
		compatible = "qcom,coresight-tpda";
		reg = <0x6004000 0x1000>;
		reg-names = "tpda-base";

		coresight-name = "coresight-tpda";

		qcom,tpda-atid = <65>;
		qcom,bc-elem-size = <8 32>,
				    <10 32>;
		qcom,tc-elem-size = <4 32>,
				    <7 32>,
				    <10 32>;
		qcom,dsb-elem-size = <2 32>,
				     <8 32>,
				     <10 32>,
				     <11 32>;
		qcom,cmb-elem-size = <4 32>,
				     <5 32>,
				     <6 32>,
				     <10 64>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				reg = <0>;
				tpda_out_funnel_qatb: endpoint {
					remote-endpoint =
						<&funnel_qatb_in_tpda>;
				};
			};
			port@2 {
				reg = <2>;
				tpda_in_funnel_dlct: endpoint {
					slave-mode;
					remote-endpoint =
						<&funnel_dlct_out_tpda>;
				};
			};
			port@3 {
				reg = <4>;
				tpda_in_tpdm_vsense: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_vsense_out_tpda>;
				};
			};
			port@4 {
				reg = <5>;
				tpda_in_tpdm_dcc: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_dcc_out_tpda>;
				};
			};
			port@5 {
				reg = <6>;
				tpda_in_tpdm_prng: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_prng_out_tpda>;
				};
			};
			port@6 {
				reg = <8>;
				tpda_in_tpdm_qm: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_qm_out_tpda>;
				};
			};
			port@7 {
				reg = <10>;
				tpda_in_tpdm_pimem: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_pimem_out_tpda>;
				};
			};
			port@8 {
				reg = <11>;
				tpda_in_tpdm: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_out_tpda>;
				};
			};
		};
	};

	tpdm_vsense: tpdm@7038000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x7038000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-vsense";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_vsense_out_tpda: endpoint {
				remote-endpoint = <&tpda_in_tpdm_vsense>;
			};
		};
	};

	tpdm_dcc: tpdm@7054000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x7054000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-dcc";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_dcc_out_tpda: endpoint {
				remote-endpoint = <&tpda_in_tpdm_dcc>;
			};
		};
	};

	tpdm_prng: tpdm@704c000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x704c000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-prng";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_prng_out_tpda: endpoint {
				remote-endpoint = <&tpda_in_tpdm_prng>;
			};
		};
	};

	tpdm_qm: tpdm@71d0000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x71d0000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-qm";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_qm_out_tpda: endpoint {
				remote-endpoint = <&tpda_in_tpdm_qm>;
			};
		};
	};

	tpdm_pimem: tpdm@7050000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x7050000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-pimem";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_pimem_out_tpda: endpoint {
				remote-endpoint = <&tpda_in_tpdm_pimem>;
			};
		};
	};

	tpdm: tpdm@6006000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x6006000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm";
		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_out_tpda: endpoint {
				remote-endpoint = <&tpda_in_tpdm>;
			};
		};
	};

	tpda_nav: tpda@7191000 {
		compatible = "qcom,coresight-tpda";
		reg = <0x7191000 0x1000>;
		reg-names = "tpda-base";

		coresight-name = "coresight-tpda-nav";

		qcom,tpda-atid = <68>;
		qcom,cmb-elem-size = <0 32>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				reg = <0>;
				tpda_nav_out_funnel_in1: endpoint {
					remote-endpoint =
						<&funnel_in1_in_tpda_nav>;
				};
			};
			port@1 {
				reg = <0>;
				tpda_nav_in_tpdm_nav: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_nav_out_tpda_nav>;
				};
			};
		};
	};

	tpda_apss: tpda@7bc2000 {
		compatible = "qcom,coresight-tpda";
		reg = <0x7bc2000 0x1000>;
		reg-names = "tpda-base";

		coresight-name = "coresight-tpda-apss";

		qcom,tpda-atid = <66>;
		qcom,dsb-elem-size = <0 32>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				reg = <0>;
				tpda_apss_out_funnel_apss_merg: endpoint {
					remote-endpoint =
					       <&funnel_apss_merg_in_tpda_apss>;
				};
			};
			port@1 {
				reg = <0>;
				tpda_apss_in_tpdm_apss: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_apss_out_tpda_apss>;
				};
			};
		};
	};

	tpdm_apss: tpdm@7bc0000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x7bc0000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-apss";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_apss_out_tpda_apss: endpoint {
				remote-endpoint = <&tpda_apss_in_tpdm_apss>;
			};
		};
	};

	tpda_mss: tpda@7043000 {
		compatible = "qcom,coresight-tpda";
		reg = <0x7043000 0x1000>;
		reg-names = "tpda-base";

		coresight-name = "coresight-tpda-mss";

		qcom,tpda-atid = <67>;
		qcom,dsb-elem-size = <0 32>;
		qcom,cmb-elem-size = <0 32>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				reg = <0>;
				tpda_mss_out_funnel_dlct: endpoint {
					remote-endpoint =
						<&funnel_dlct_in_tpda_mss>;
				};
			};
			port@1 {
				reg = <0>;
				tpda_mss_in_tpdm_mss: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_mss_out_tpda_mss>;
				};
			};
		};
	};

	tpdm_mss: tpdm@7042000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x7042000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-mss";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_mss_out_tpda_mss: endpoint {
				remote-endpoint = <&tpda_mss_in_tpdm_mss>;
			};
		};
	};

	tpdm_nav: tpdm@7190000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x7190000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-nav";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_nav_out_tpda_nav: endpoint {
				remote-endpoint = <&tpda_nav_in_tpdm_nav>;
			};
		};
	};

	tpda_olc: tpda@7b92000 {
		compatible = "qcom,coresight-tpda";
		reg = <0x7b92000 0x1000>;
		reg-names = "tpda-base";

		coresight-name = "coresight-tpda-olc";

		qcom,tpda-atid = <69>;
		qcom,cmb-elem-size = <0 64>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				reg = <0>;
				tpda_olc_out_funnel_apss_merg: endpoint {
					remote-endpoint =
						<&funnel_apss_merg_in_tpda_olc>;
				};
			};
			port@1 {
				reg = <0>;
				tpda_olc_in_tpdm_olc: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_olc_out_tpda_olc>;
				};
			};
		};
	};

	tpdm_olc: tpdm@7b90000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x7b90000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-olc";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_olc_out_tpda_olc: endpoint {
				remote-endpoint = <&tpda_olc_in_tpdm_olc>;
			};
		};
	};

	funnel_dlct: funnel@71c3000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b908>;

		reg = <0x71c3000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-dlct";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "apb_pclk", "core_a_clk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_dlct_out_tpda: endpoint {
					remote-endpoint =
					    <&tpda_in_funnel_dlct>;
				};
			};
			port@1 {
				reg = <1>;
				funnel_dlct_out_funnel_qatb: endpoint {
					remote-endpoint =
					    <&funnel_qatb_in_funnel_dlct>;
				};
			};
			port@2 {
				reg = <0>;
				funnel_dlct_in_tpdm_dlct: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpdm_dlct_out_funnel_dlct>;
				};
			};
			port@4 {
				reg = <1>;
				funnel_dlct_in_audio_etm0: endpoint {
					slave-mode;
					remote-endpoint =
						<&audio_etm0_out_funnel_dlct>;
				};
			};
			port@5 {
				reg = <2>;
				funnel_dlct_in_tpda_mss: endpoint {
					slave-mode;
					remote-endpoint =
						<&tpda_mss_out_funnel_dlct>;
				};
			};
		};
	};

	tpdm_dlct: tpdm@71c2000 {
		compatible = "qcom,coresight-tpdm";
		reg = <0x71c2000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-dlct";

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>;
		clock-names = "core_clk", "core_a_clk";

		port{
			tpdm_dlct_out_funnel_dlct: endpoint {
				remote-endpoint = <&funnel_dlct_in_tpdm_dlct>;
			};
		};
	};

	hwevent: hwevent@158000 {
		compatible = "qcom,coresight-hwevent";
		reg = <0x158000 0x80>,
		      <0x17091000 0x80>,
		      <0x1730200c 0x4>,
		      <0xc90137c 0x4>,
		      <0xc828018 0x80>,
		      <0x1c00058 0x80>,
		      <0x5e02038 0x4>,
		      <0x5e02028 0x10>,
		      <0x1fcb360 0x80>,
		      <0x1fcb760 0x80>,
		      <0x1fcbf60 0x80>,
		      <0xa8f8860 0x4>,
		      <0x500c260 0x4>,
		      <0x500d040 0x4>,
		      <0x1da6400 0x80>;
		reg-names = "gcc-ctrl", "lpass-stm", "lpass-qdsp", "mdss-mdp",
			    "mdss-misc", "pcie0-hwev", "ssc-en", "ssc-hwev",
			    "tcsr-qdss", "tcsr-mss0", "tcsr-mss1", "usb-ctrl",
			    "vbif-stm", "vbif-stm-en", "ufs-mux";

		coresight-name = "coresight-hwevent";
		coresight-csr = <&csr>;

		clocks = <&clock_rpmcc RPM_SMD_QDSS_CLK>,
			 <&clock_rpmcc RPM_SMD_QDSS_A_CLK>,
			 <&clock_mmss MMSS_MISC_AHB_CLK>;
		clock-names = "apb_pclk", "core_a_clk", "core_mmss_clk";

		qcom,hwevent-clks = "core_mmss_clk";
	};


	modem_etm0 {
		compatible = "qcom,coresight-remote-etm";

		coresight-name = "coresight-modem-etm0";
		qcom,inst-id = <2>;

		port{
			modem_etm0_out_funnel_in1: endpoint {
				remote-endpoint = <&funnel_in1_in_modem_etm0>;
			};
		};
	};

	audio_etm0 {
		compatible = "qcom,coresight-remote-etm";

		coresight-name = "coresight-audio-etm0";
		qcom,inst-id = <5>;

		port{
			audio_etm0_out_funnel_dlct: endpoint {
				remote-endpoint = <&funnel_dlct_in_audio_etm0>;
			};
		};
	};

	rpm_etm0 {
		compatible = "qcom,coresight-remote-etm";

		coresight-name = "coresight-rpm-etm0";
		qcom,inst-id = <4>;

		port{
			rpm_etm0_out_funnel_in0: endpoint {
				remote-endpoint = <&funnel_in0_in_rpm_etm0>;
			};
		};
	};

	turing_etm0 {
		compatible = "qcom,coresight-remote-etm";

		coresight-name = "coresight-turing-etm0";
		qcom,inst-id = <13>;

		port{
			turing_etm0_out_funnel_in1: endpoint {
				remote-endpoint = <&funnel_in1_in_turing_etm0>;
			};
		};
	};
};
